Angelos Arelakis

Co-founder and Chief Technology Officer, ZeroPoint Technologies AB

Angelos Arelakis is the Chief Technology Officer (CTO), and a co-founder and co-inventor of ZeroPoint Technologies. He is an expert in memory system architectures and ultra-fast data lossless compression. He holds an engineering diploma Dipl-Eng (2006) in ECE from TU Crete, Greece, an M.Sc (2008) in CE from TU Delft, The Netherlands and a Ph.D. degree (2015) in Computer Architecture from CSE, Chalmers University of Technology, Sweden. He has published in flagship computer architecture conferences (ISCA, MICRO) as well as a book. He has contributed with 10 patents. He has earned two paper awards from the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC). He has received a scholarship from the King of Sweden Carl XVI Gustaf Foundation’s 50th anniversary fund for science, technology and the environment. He is a member of HiPEAC and ACM.

Angelos is speaking at

September 2, 2020
5:30 pm - 5:50 pm

Speaker

  • Angelos Arelakis (Speaker) Co-founder and Chief Technology Officer, ZeroPoint Technologies AB

Description

Memory compression allows data to be stored compactly in memory, thereby increasing memory capacity without increasing the amount of physical memory. This translates into higher performance and thereby a higher performance/watt ratio.

For server systems, when memory capacity per socket has maxed out, adding more sockets to increase the amount of physical memory leads to lower system performance and cost. For smart devices, such as smartphones, memory compression can offer higher memory capacity thereby boosting the user-perceived value at lower cost.

We present Ziptilion™, the first general-purpose IP-block product for integration in SoC platforms developed by the fabless Swedish company ZeroPoint Technologies. It enables an unprecedented memory expansion by a factor 2.5X and 30% more effective memory bandwidth. We discuss how the IP-block is architected, detailing the hardware-accelerated functionality and how it is integrated into a System-on-Chip. A first technical contribution is new statistical, real-time compression algorithms offering substantially higher compression ratios than what is known from state of the art. Another technical contribution is the novel approach taken by Ziptilion™ to manage the compressed memory in an operating-system (OS) transparent way through by forming an ultrafast large RAM-based swap space from the memory freed up by compression. Finally, Ziptilion™ offers novel optimizations at the hardware level to deal with ultrafast memory-side translation between the OS-physical and the compressed address spaces.



You can also watch the conference live through YouTube. The links are available in the community board (WebApp Link).

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