FPGAs have proven themselves for prototyping, as well as a technology for verification of ASICs. Maxeler MaxWare tools provide global optimization of data movement. The Maxeler compiler, release 2020.1, now has targets for Xilinx FPGAs, Intel FPGAs and Synopsys synthesis for driving the full ASIC flow. To this end, Maxeler partners with Silicon Catalyst in California to make ASICs.
You can also watch the conference live through YouTube. The links are available in the community board (WebApp Link).