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Jobs Posted on the Whova Community Board of 18th International SoC Conference (ISOCC 2021)

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Staff Application Engineer (P&R, Physical Design)
Synopsys
In this role, you will be part of the high-performance team to deliver the best-in-class digital design implementation solutions for the most cutting-edge technology nodes, tightly collaborating with the leading foundry partner to enable the new technology features and the design rules, acting as R&D liaison to drive new feature development, technology file development, PPA enhancement, and design flow evolution. The key responsibilities include:

• Develop foundry process specific design implementation solutions in accordance to the latest manufacturing rules and design requirements
• Institutionalize working model between foundry partner, product owner, and mutual customers to establish baseline flow and path for technology enablement
• Generate, utilize, and analyze various design data to formulate design flow optimization to drive QoR improvements towards PPA targets
• Work in conjunction with field technical team to enable new node adoption for mutual customers

Key Qualifications
• BS or MS in Electrical Engineering with 10+ years of physical implementation, verification and relevant design methodology experience
• Deep knowledge in physical design methodologies and flow
• Proficiency in programming and scripting (TCL, Python, Shell)
• Ability to resolve wide range of technical issues independently
• Ability to understand new manufacturing process requirements and enable EDA feature development to satisfy design challenges and needs
• Excellent communication and interpersonal skills.

Preferred Experience
• Experience in physical design, logic synthesis, timing and power analysis with Synopsys tools; technology file development experience a plus
• Customers facing or sales enablement roles with relationship management
• Ability to solve problems even with ambiguity and uncertainty
• Drive resolution through fact-based, conscious decision making
• Proficiency in interpersonal skills and English communication

Link: https://sjobs.brassring.com/TGnewUI/Search/Home/Home?partnerid=25235&siteid=5360&SID=%5EeHrRKv4VdjQ7C262B4UjNxV4peWzRJA%2FevZ46dXWB5E9A6QFXoSEewRWUduSDT7A#jobDetails=1913948_5360
Sr. Application Engineer (Physical Design)
Synopsys
We're looking for Application Engineer to join our team. Does this sound like a good role? Key Qualifications
• Minimum of 10+ years physical design, verification, or related work experience.
• Expected to be an expert in physical design implementation and design methodology development.
• Proficiency in programming and scripting (TCL, Python, Shell).
• Able to resolve wide range of technical issues independently in creative ways on a regular basis.
• Excellent communication and interpersonal skills.
• Proficient in verbal and written English.
• Working in Synopsys Korea located in Pangyo.
Preferred Experience
• Experience in playing a critical role in physical design, logic synthesis, and timing and power analysis.
• It's a plus if the experience was with the technology file, design rule, and process integration.
• Having experience in interfacing with customers and managing the relationship is required.
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.

Link: https://jobs.brassring.com/TGnewUI/Search/home/HomeWithPreLoad?PageType=JobDetails&partnerid=25235&siteid=5359&Areq=26512BR
Senior Staff Application Engineer
Synopsys
In this role, you will be part of the high-performance team to deliver the best-in-class digital design implementation solutions for the most cutting-edge technology nodes, tightly collaborating with the leading foundry partner to enable Design-Technology Co-Optimization (DTCO), acting as R&D liaison to drive new feature development, PPA enhancement, and design flow evolution. The key responsibilities include:

• Develop foundry process specific design implementation solutions in accordance to the latest manufacturing rules and design requirements
• Institutionalize working model between foundry partner, product owner, and mutual customers to establish baseline flow and path for PPA enhancement
• Generate, utilize, and analyze various design data to formulate design flow optimization to drive QoR improvements towards PPA targets
• Work in conjunction with field technical team to enable new node adoption for mutual customers

Key Qualifications
• BS or MS in Electrical Engineering with 15+ years of physical implementation, optimization, verification and relevant design methodology experience
• Deep knowledge in physical design methodologies, algorithms, and flow
• Proficiency in programming and scripting (TCL, Python, Shell)
• Ability to resolve wide range of technical issues independently
• Excellent communication and interpersonal skills.

Preferred Experience
• Experience in physical design, logic synthesis, timing and power analysis with Synopsys tools; design tape-out experience a plus
• Customers facing or sales enablement roles with relationship management
• Ability to solve problems even with ambiguity and uncertainty
• Drive resolution through fact-based, conscious decision making
• Proficiency in interpersonal skills and English communication
R&D Software Engineer - Innovus
Cadence Design Systems
Innovus is a worldwide leading post end of the line (PEOL) digital design platform.
The candidate will be a member of the Innovus placement team in Korea, to work on the development and maintenance of placement projects.

Requirements:
- MS/PhD from EE, computer science, math or related with 3+ years experience.
- Strong software programming skill with C/C++, advanced developing and debugging capacity in Unix/Linux environment, familiar with gdb etc.
- Strong problem-solving, algorithmic capacity and familiar with optimization algorithm is preferred.
- Experience with script language, TCL is a plus.
- EDA backend knowledge will be a strong plus.
- Good verbal and written presentations are must.
Link: https://www.linkedin.com/jobs/view/2730879657/?capColoOverride=true
Sr. Corporate Application Engineer – Calibre DS
Siemens EDA
Job Responsibilities
• Providing technical support to customers via telephone and other electronic means, and at customer locations
• Assisting customers in deploying Siemens EDA’s software to solve design challenges
• Tracking and updating customer issues using defined Siemens EDA’s processes and tracking tools
• Developing and delivering technical presentations and training on new features and product updates
• Developing technical content for Siemens EDA's knowledge-base
• Communicating customers' technical requirements as well as customer issues to product division and sales team
• Working collaboratively with the customer and team members to ensure mutual success
Link: https://jobs.siemens.com/disw/jobs/275101?lang=en-us&previousLocale=en-US
Principal Product Engineer - Innovus
Cadence Design Systems
- Seeking a highly motivated, customer-facing engineer who can spearhead Digital Implementation & Signoff engagements with top tier global customers working closely with Account Field Teams and R&D teams together.
- The position provides an excellent opportunity to work closely with the customer and providing feedback to R&D team to define the roadmap of the products
- Prior Designer, Product Engineering or Application Engineering experience in digital implementation (Synthesis, Physical Design, Place and Route) and sign-off (timing/physical)
- Understand industry challenges in digital implementation & sign off domain with exposure to 28nm & below foundry process nodes
- Industry Experience with Cadence EDA tools in the IC digital sign-off flow, preferably on EDI, RC and Signoff tools
- Experience in Logic Design and Synthesis, Formal Verification, Low Power Design, Physical Design and Timing Closure for block-level and Top Level Designs
- Knowledge of ARM Processor Architecture and the Implementation Flow – Synthesis, Physical Design and Timing Closure
Link: https://www.linkedin.com/jobs/view/2730880228/?capColoOverride=true
Principal Product Engineer - Xcelium
Cadence Design Systems
- Work with R&D to identify and scope opportunities for the Cadence functional logic verification platform
- Understand the Goal and Objective, then plan and execute and manage key technical evaluations by co-working proactively with existing and potential customers as well as team colleagues
- Summarize the tasks and projects, and report to manager and share with team effectively
- Train, ramp-up and accompany customer project.
- Conduct basic and advanced trainings, presentations and demos as necessary.
- Ramp-up other members of the team on the advanced verification technologies and tools.
- Providing technical expertise to address clients’ queries, which need expert involvement
Link: https://www.linkedin.com/jobs/view/2730877521/?capColoOverride=true
Associate Application Engineer – Calibre DS
Siemens EDA
Job Description
Siemens Electronic Design Automation (hereafter Siemens EDA) is now inviting applications for our Associate / Graduate Program for the position of Associate Applications Engineer – Calibre Design Solution
In this position, you will be involved in a structured Associate Engineer Training Program. This is a fast-track training program that challenges you to develop the expertise needed to solve difficult technical problems and the commercial skills needed to work with customers within the region.
Associate Applications Engineers join us as members of a team of highly motivated individuals working with customers designing the most complex hardware and software systems in the world and whose applications span the electronics industry. This training program will give you unique insight into our product marketing divisions and sales organization and the opportunity to work with and learn from industry experts.
Upon successful completion of the program, you will be eligible to progress into an Application Engineer role, focusing on developing technical relationships at the engineering level with customers including customer presentations, needs analysis, product demonstrations, and coordination of benchmarking and evaluation activities.

Job Qualifications
 New graduate (2021-2022) with a BS/MS EE, Electronics, Physics or related.
 UNIX/LINUS exposure, Perl/ Tcl/TK, C/C++, Shell Script is a plus.
 Course work or project experience with IC layout and physical verification tool (DRC/LVS/XRC)
 Good interpersonal and communication skills with an inclination to Sales environment.
 Some travel is required.
 A team player as well as independent worker, Good problem-solving capabilities.
R&D Software Engineer - Liberate
Cadence Design Systems
- Enhancing and expanding the existing tools' architecture to cover timing analysis
- Creating new frameworks for analysis of effects dominant at n5 and below
- Using machine learning technology to bring order of magnitude speed/capacity/usability improvements over existing solutions
- Supporting existing customers deploying early new features

Desired Skills and Experience:
- Industry experience developing and maintaining C++ based applications on a Unix or Linux environment
- Experience in development of circuit simulation programs and one or more of transistor level timing, aging, reliability, power and emir analysis
- Experience with quality and software processes
- Proficiency designing data structures, algorithms, and software engineering principles
- Proficiency in analyzing transistor or gate level schematics
Link: https://cadence.wd1.myworkdayjobs.com/External_Careers/job/GYEONGGI-DO-Seoul/Lead-Software-Engineer---Library-Characterization_R35116
Principal Product Engineer - Spectre FX
Cadence Design Systems
- Circuit/memory transistor-level design knowledge/experience
- Strong Hands-on experience in spice/fastspice simulation.
- Good English communication skills
- MSEE with EDA and IC designer experience
Link: https://cadence.wd1.myworkdayjobs.com/External_Careers/job/GYEONGGI-DO-Seoul/Principal-Product-Engineer---Spectre-FX_R35535
Sr. Corporate Application Engineer - DVT
Siemens EDA
Job Responsibilities
• Provide technical support to customers via telephone and other electronic means, and at customer locations.
• Assist customers in deploying Mentor Graphics' Functional Verification software to solve design challenges.
• Track and update customer issues using defined Mentor Graphics' processes and tracking tools.
• Develop and deliver technical training on new features and product updates.
• Develop technical content for Mentor's knowledge base.
• Communicate customers' technical requirements as well as customer issues to the product and sales teams.
• Work collaboratively with team members to ensure mutual success.
Job Qualifications
• Bachelor degree in EE and related field required.
• More than 5 years experience in related field.
• Verification of Full SoC and IP level : Verilog RTL simulation is must, Validation of IP on FPGA platform is a plus.
• Familiar with System Verilog, UVM is must.
• SOC work & verification with ARM Cores, protocols like AXI, ACE, APB a plus.
• Familiar with mobile AP, memory spec. like DDR, LPDDR is a plus.
• Tool Experience: Xcelium (Incisive), Questa, VCS.
• Design and Simulation in RTL : Verilog-HDL, VHDL, GLS (Gate-Level-Simulation).
• RTL Debugger: DVE, Verdi, Simvision, Questa Visualizer.
• Logic Synthesis : DC Complier is a plus.
• Power verification : Power Pro, Spyglass, UPF flow verification is a plus.
• Communicate effectively in verbal and written form in English.
• Build strong rapport and credibility with customer organizations while maintaining a company internal network of contacts.
• With strong communications and interpersonal skills.
Link: https://jobs.siemens.com/disw/jobs/249283?lang=en-us&previousLocale=en-US
Principal Design Engineer - AE
Cadence Design Systems
We are seeking talented Application Engineers dedicated for physical design in Cadence Korea. You will be responsible for the physical design implementation projects.



Job Description

- The candidate will perform the physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.
- The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed designs at the latest technology nodes.
- The responsibility of the candidate includes participating in or leading next generation physical design, methodology and flow development.
- The candidate will work closely with RTL design team to ensure successful tapeouts.
Link: https://www.linkedin.com/jobs/view/2730880509/?capColoOverride=true
Sr. Application Engineer - HAV
Siemens EDA
Job Responsibilities
• Drive business for Siemens EDA using hands-on technical expertise.
• Requires working directly with customers as a part of the sales team during product evaluations to ensure technical milestones are met.
• Deploy Siemens EDA emulation software and hardware solutions at customers.
• Promote technical customer service to build and improve customer relationships to ensure long term customer satisfaction.
• Work closely with area sales management, account teams and customers to understand business opportunities and requirements.
• Troubleshoot and remove technical obstacles.
• Develop and deliver technical presentations on new features and product updates.
• Provide feedback and product ideas to our emulation product development teams to improve overall product.
• Communicate customers' technical requirements to product marketing.
• Develop a network of technical relationships at a peer-to-peer level with our customers.
• Work collaboratively with team members to ensure mutual success.
Job Qualifications
• 5~10 years’ experience in design, verification, simulation, emulation/prototyping of electronics chips and systems or recent experience as an Applications Engineer in a relevant field.
• BS or MS in EE, CE, CS or related areas.
• SystemVerilog, Verilog and VHDL RTL design experience.
• Chip/ASIC design or verification experience - knowledge of SystemVerilog/Verilog/VHDL language, RTL, behavioral coding and general ASIC debug.
• ASIC and/or FPGA implementation experience. (synthesis,place&route)
• C programming desirable. SystemC and C++ used in conjunction with chip design and verification highly desired.
• Must have previous experience with industry simulation environments using Questa/Incisive/VCS, OVM or UVM. Experience with industry emulation solutions (Veloce/Palladium/ZeBu) highly desired.
• Knowledge of Transaction Level Modeling and methodologies would be beneficial.
• Firmware, Linux driver, Android OS level validation experience on em
Principal Application Engineer - Innovus
Cadence Design Systems
- Work closely with the sales team to identify and scope opportunities for the Cadence DSG platform.
- Understand the Goal and Objective, then plan and execute and manage key technical evaluations by co-working proactively with existing and potential customers as well as team colleagues
- Summarize the tasks and projects, and report to manager and share with team effectively
- Train, ramp-up and accompany customer project.
- Conduct basic and advanced trainings, presentations and demos as necessary.
- Ramp-up other members of the team on the advanced ICD back-end technologies and tools.
- Providing technical expertise to address clients’ queries, which need expert involvement
Link: https://www.linkedin.com/jobs/view/2730881373/?capColoOverride=true
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