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Jobs Posted on the Whova Community Board of 2022 IEEE Symposium on VLSI Technology and Circuits

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Postdoc at imec
3d sram macro and soc design
Analog Power IC design engineer
Texas Instruments
If you are looking to join an ingenious, vigorous, ambitious, dynamic and talented team that consistently delivers groundbreaking technologies into the custom power world, here is an opportunity for you!

The Custom Power Products product line is delivering industry leading power system solutions including Battery Chargers, PMICs, Camera Flash LED drivers etc. This is a great opportunity to be part of the best custom power semiconductor team in the world.

In This Role, Responsibilities May Include

- Lead an Analog IC design team with product ownership and responsibility from definition to release to manufacturing

- Translate system requirements to chip and block level architecture and specifications

-Design high performance PMIC blocks including high efficiency switching regulators

- Make assignments for team members, providing design guidance as needed, developing schedules and monitoring progress throughout the project

- Work with and provide guidance to physical designers and monitors the progress of IC layout

- Collaborate with validation, product engineering and test engineering teams to enable successful transfer to production

- Evaluate system-level use-cases and re-create these in simulation

- Interface and lead discussions with the customer to understand customer designs, problems and support as required

- Actively participate in hiring, developing and evaluating personnel to ensure efficient operation of the organization and growth of the individuals into leader

Minimum Requirements

- Master’s degree in Electrical Engineering or related field of study
- Minimum 7+ years of relevant experience
- Extensive background in Power IC design

Link: None
Research - Lithography process engineer
IBM Research
Lithography process engineer
Ph.D./Post-doc at EPFL
Mixed Signal IC (MSIC) Lab at EPFL is looking for a talented Ph.D.s / Post-docs to work on the following topics: in-memory compute, adc-based serial link, high voltage DCDC converters, sensor readouts.

Please don't hesitate to contact Prof. Choo if you are interested! We can set up to meet during the conference :)
Link: None
PhD on low power DC DC converter IC design at TU Delft
TU Delft
We are looking for a talented PhD candidate with good IC design background to work on low power DC DC converters for energy harvesting.
DMS Modeling and Verification Engineer
Apple Japan
As a DMS modeling and verification Engineer, you will be responsible for modeling and verifying analog/mixed-signal designs including:
- Develop accurate and simulation-efficient analog behavior models for analog/RF blocks in SystemVerilog.
- Verify analog behavior models are accurate representations of analog schematics.
- Verify analog block functionalities against its design specifications using analog behavior models: for example, coding testbenches, test scenarios and assertions for analog functional verification.
- Document modeling and verification results for formal review.
Analog Circuit Designer
Microchip Technology
analog design for compute-in-memory, prefer experience in data conversion design
Front End Integration Engineer
This position is in the Logic Technology Development team working in one of the most advanced semiconductor process technologies in the world. You will design, execute, and analyze experiments to develop the process of the next technologies to come into the market. Come join us and help shape the future of the semiconductor process for decades to come.
Backend Integration Engineer
This position is in the Logic Technology Development team working in one of the most advanced semiconductor process technologies in the world. You will design, execute, and analyze experiments to develop the process of the next technologies to come into the market. Come join us and help shape the future of the semiconductor process for decades to come.
Advanced Device Engineer
This position is in the Logic Technology Development team working in one of the most advanced semiconductor cleanroom facilities in the world. You will be designing, executing, and analyzing experiments necessary to meet engineering specifications for their process. The most exciting part of this role is that you will be taught how to operate a manufacturing line to integrate the many individual steps necessary for the manufacture of complex microprocessors.
Senior Design Verification Engineer (Japan Design Center)
Apple Japan
• Construction of verification environment by using Verilog, SystemVerilog or UVM.
• Designing test plan for verification.
• Coding test scenarios, assertion and debugging for Digital Design.
Analog IC Design Engineer (Japan Design Center)
Apple Japan
In this role, the key responsibilities are the followings:
- Create High-speed link-budget and specification definition for PHY
- Create block-level specifications based on link-budget and transistor-level feasibility
- Perform transistor-level feasibility studies for various blocks in Rx/Tx/Clk generation
- Design and simulate transistor-level design of PHY high-speed blocks
- Collaborate with layout designers for overall circuit design including layout parasitic and mismatch.
- Document design and simulation results for formal design review process.
- Define production / bench-level test plans for production / evaluation.
Post-doc / Effect of TSV presence on BEOL reliability for 3-layer stacked CMOS image sensor (CIS)
Because conventional downsizing based on the empirical Moore's law has reached its limitations, an alternative integration technology, such as three-dimensional integration (3DI) is becoming the mainstream. The 3rd generation of CMOS image sensor (CIS) stacks up to 3 die interconnected by hybrid bonding and High Density Through Silicon Vias (HD-TSVs). Devices and circuits good functioning and integrity have to be maintained in such an integration especially in the close neighborhood of TSVs. Thermal budget, copper pumping, thin wafer warpage can lead to electrical yield and reliability concerns and must be investigated.

The work consists in evaluating the impact of TSV processing and proximity on BEOL and FEOL performance and reliability. Acquired data sets will help to define design rules and in particular a potential Keep-Out Zone (KOZ) and calibrate a finite element model (FEM).
RFIC Designer for Quantum Computing
The lab research activity focuses on enabling integration of next generation radio transceivers in deeply-scaled CMOS technologies. We drive innovation in architecture, radio building-blocks and design methodologies to achieve beyond state-of-the-art performance and maintain Moore's law scaling for both digital and RF/analog circuitry. The focus of this specific position is to develop integrated circuitry for control and readout of quantum bits (qubits) to enable future scaling of quantum computers. These control signals are in the range of microwaves (1-20GHz) and typical architectures used today resemble RF transceivers or RF arbitrary waveform generators.

In this unique research position, your responsibility may include:
- Research into current state-of-the-art discrete RF/AWG architectures used for qubits control
- Investigate minimum signal specifications, architectures and circuit design for RF/AWG systems for qubit control and readout to be integrated in deeply-scaled CMOS technologies and operate at very low temperatures (4K and below)
- Develop high-level behavioral models to validate proposed system architectures
- Design and validate circuit blocks and entire systems with RF/mixed signal design environment like Cadence
- Participate into experimental verifications and measurements of fabricated silicon prototypes
- Hands-on work on qubit experiments using both external and integrated controllers.
Mixed Signal Research Scientist (Internship)
Business group:
Intel Labs is the company's world-class, industry leading research organization, responsible for driving Intel's technology pipeline and creating new opportunities. The mission of Intel Labs is to deliver breakthrough technologies to fuel Intel's growth. This includes identifying and exploring compelling new technologies and high risk opportunities ahead of business unit investment and demonstrating first-to-market technologies and innovative new usages for computing technology. Intel Labs engages the leading thinkers in academia and industry in addition to partnering closely with Intel business units.

Desired Skills:
- Proficiency with System Verilog RTL, System C and Matlab.
- Experience with behavioral modeling and verification of mixed-signal systems in Matlab and Verilog.
- Experience prototyping FPGA from RTL using industry standard tools including constraints, synthesis, formal verification, and timing closure.
- Knowledge of spread spectrum clocking techniques
- Knowledge of secure key transfer in digital computing systems.
Mixed-Signal Research Scientist
About the organization:
You will be joining the Radio Circuits and Architecture (RCT) team within the Wireless System Research Lab in Intel Labs. RCT research activity focus on enabling integration of next generation radio transceivers in deeply scaled CMOS technologies. We drive innovation in architecture, radio building-blocks and design methodologies to achieve beyond state-of-the-art performance and maintain Moore's law scaling for both digital and RF/analog circuitry. The focus of this specific position is to explore, design and validate innovative circuits and radio architectures for next generation wireless communication systems.

About the role:
In this position your responsibilities include: Development of mixed signal transceiver circuitry for application to high-speed communication systems. Heavier focus will be on mixed signal blocks like Analog to Digital (A/D) and Digital to Analog (D/A) converters but will include other transceiver circuits. Mixed signal integration validation using behavioral models and industry standard tools to verify system function and performance. Hands-on testing of systems in the lab using state-of-the-art equipment. The ideal candidate will advance the state of the art through patents and publications.
Visiting student researcher (Open source IC design)
Are you doing work in open source silicon or integrated circuit design? You could join the team behind at Google to push forward the state of open source in this space!
Lab Engineer for Analog/Mixed Signal/RF
Silicon Austria Labs
Your future responsibilities
- Define and implement measurement setups and automation, including handling of analog/RF/mmW measurement equipment
- Maintenance, service and ordering of lab facilities and equipment
- PCB design, BOM generation and ordering, PCB assembly, etc. of analog/RF/mmW designs
- Measurement and characterization of analog/mixed-signal/RF/mmW testchips and RF transceiver.
- Automation of characterization (statistics)
- Lab documentation and inventory management

Your profile
- Master’s degree in Electronics or in related area of expertise
- Bachelor´s degree or graduated from a higher technical education institute (HTL) - min. of 3 years relevant work experience in related fields is highly welcome.
- Experience of working as a Lab technician
- Programming knowledge with MATLAB and Python
- Effective written and verbal communication skills
- Interested in technical science and open to work independently
- Familiar with Office tools (Word, Excel, …)

Optional skills (good to have):
- Proficient with Mixed-Signal/RF/mmW measurements (Pout, P1-dB, IP3, S-parameters, SNR, etc.)
- Experience with wafer probing stations
- Knowledge on characterization of analog/mixed-signal/RF integrated circuits
- Experience with PCB assembly and soldering
- Knowledge about antenna characterization
Senior Scientist - RFIC Design / mm-Wave and sub-Terahertz Receivers
Silicon Austria Labs

Your future responsibilities
- System & circuit solutions for multi-gigabit wireless chips.
- Involvement in receiver architecture selection & receiver system to circuit specifications translation.
- Implementing blocks & documenting design towards formal design reviews.
- Drive layout & top-level simulations to validate top-level integration.
- Supervision of Junior Scientists.
- Project Responsibilities.

Your profile
- Master‘s degree in relevant field with 5+ years of experience in related area of expertise or PhD with 3 years of experience.
- Deep understanding of fundamental microwave theories & concepts such as:
- power waves and scattering parameters
- transmission-lines concepts
- power gain expressions
- gain, noise, and VSWR design trade-offs
- High proficiency in system specification & ability to translate system into circuit requirements at IC level.
- Familiar with various RF receiver architectures & their trade-offs.
- Understanding of mmWave device modeling.
- Insights into packaging effects, supply isolations, high frequency ESD structures & circuit layout for optimum performance.
- Experience in simulation & design of lumped & distributed passive structures.
- Proficient with EDA CAD tools. (Cadence, Mentor, Ansys, etc.)
- Performing Analog Custom Layout.
- Experience in measuring IC performance & debug of design to correlate simulations to measurements.

Senior RFIC design Scientist for RF/mmWave transceiver generators
Silicon Austria Labs
Your future responsibilities
- Creating intelligent analog/RF/mm-wave IPs towards the automation of the design flow and design portability of analog circuits
- Working within analog generator framework at the crossroad between automation, programmatic IC design and AI towards system and circuit transceiver (TX/RX) solutions that satisfy predefined 5G/6G system level specifications
- Coding in Python TX/RX design methodology or/and floorplan
- Supervision of Junior Scientist
- Project responsibilities
- Publication of the results at conferences or in scientific journals

Your profile
- Deep understanding of fundamental analog/ RF and mm-Wave theories and concepts
- Familiar with various RF transceiver and/or receiver architectures and their trade-offs
- High proficiency in ability to translate system into circuit requirements at IC level
- Proficiency with EDA CAD tools (Cadence, Mentor, etc.)
- Python knowledge
- Linux knowledge is a plus
- Team player, self-motivated and goal oriented
- Master’s degree in relevant field with 5+ years of experience in related areas of expertise or PhD with 3+ years of experience

Senior Scien­tist - mm-Wave and sub-Terahertz RF Power Ampli­fiers
Silicon Austria Labs
Your future responsibilities
- Design RF power ampli­fiers for 5G massive MIMO appli­ca­tions.
- Trans­late system level speci­fi­ca­tions into design requi­re­ments from concept to physical imple­men­ta­tion.
- Charac­te­rize mm-wave ICs in detail to vali­date all the features and perfor­mance speci­fi­ca­tions.

Your profile
- Master‘s degree with 8+ years expe­ri­ence in related area of exper­tise or PhD with 5+ years of expe­ri­ence
- Exten­sive design expe­ri­ence with RF/Micro­wave power ampli­fiers (Doherty ampli­fiers, Chireix/outpha­sing ampli­fiers), power tran­sis­tors, driver ampli­fiers, hybrid-based compo­n­ents
- Design expe­ri­ence with modern DPD systems to charac­te­rize and opti­mize Doherty power ampli­fiers (AM AM, AM-PM distor­tion) and tran­sistor designs
- Expert under­stan­ding of micro­wave measu­re­ments and cali­bra­tion methods : S-para­me­ters, PAE, drain effi­ci­ency, source/load pull, EVM, ACP, linea­rity and distor­tion
- Expe­ri­ence with EDA soft­ware (ADS Keysight, Virtuoso Cadence)
- Project expe­ri­ence in using advance CMOS nodes (FDSOI expe­ri­ence a plus)

Senior Analog/Mixed-Signal IC Engineer - Bioelectronics R&D
Analog Devices
You will join our next generation Bioelectronic Platforms Group, which applies world-class integrated circuit design and nano-scale fabrication to emerging applications in the field of molecular biology. In this role, you will have broad ownership of analog/mixed-signal engineering of bioelectronic ICs for molecular biology applications ranging from DNA sequencing and synthesis to single-cell biology.

About you

You are curious to learn new physics, chemistry, and biology to understand our biotechnology partner’s applications. You are motivated to adapt your circuit designs to fit the power, performance, noise, and area demands of complex and novel biotechnology applications. You are driven to see your IC through from concept to mass production. You are ambitious to learn and contribute to key post-processing technologies, especially wafer fabrication and chip assembly techniques. You are versatile and ready to adapt to changes in our fast-paced startup-like environment.
Senior Scien­tist - RFIC Design for PLL/​Frequency Synthe­si­zers
Silicon Austria Labs
Your future responsibilities
- System and circuit solu­tions for multi-gigabit wire­less chips.
- Frequency synthe­sizer/PLL archi­tec­ture selec­tion.
- Imple­men­ting blocks and docu­men­ting design towards formal design reviews.
- Drive layout and top-level simu­la­tions to vali­date top-level inte­gra­tion.
- Take lab measu­re­ments to vali­date analog designs.

Your profile
- Solid expe­ri­ence in:
- PLL or clock/frequency gene­ra­tion design
- Under­stan­ding of RF/high-speed (10GHz+) issues
- Perfor­ming analog custom layout
- Phase noise/jitter, BW & power consump­tion design trade-offs- High proficiency in system specification & ability to trans­late system into circuit requi­re­ments at IC level.
- Deep under­stan­ding of funda­men­tals, inclu­ding
- Detailed tran­sistor level design
- Control/feed­back loop stabi­lity analysis
- Device physics is a plus
Design expe­ri­ence in advanced CMOS nodes (FD-SOI, FinFET, bulk) is a plus.
Insights into packa­ging effects, supply isola­tions, high frequency ESD struc­tures & circuit layout for optimum perfor­mance.
Expe­ri­ence in simu­la­tion and design of lumped & distri­buted passive struc­tures.
Proficient with EDA CAD tools (Cadence, Mentor, Ansys, etc.).
Proven expe­ri­ence in measu­ring IC perfor­mance and debug of design to corre­late simu­la­tions to measu­re­ments.
Masters degree with 5+ years in related area of exper­tise or PhD with 2 years of expe­ri­ence.
Analog/RF/Digital/Design/Layout/Verification Engineer
AMD/XILINX is rapidely expanding its RFSoC team in Europe. If your interested to work in an exiting environment and with the latest advanced process nodes (7nm and beyond), please contact me directly. We have opening positions for:
- Analog/RF Design Engineers
- Digital Design Engineers
- P&R/Verification Engineers
- Layout Physical Design Engineers

Full relocation package provided.

Sr. Process Engineer (ALD & Epi) - multiple openings
ASM International - Corporate R&D
ASM is a leading equipment supplier of deposition equipment and innovative process solutions to the semi industry. Our Corporate R&D organization has multiple opportunities for talented Process Engineers, both recent Ph.D. graduates and experienced at all levels. Join the ASM team and help us develop novel process solutions in ALD, PEALD, and Epitaxy to enable future industry inflections and drive Moore’s Law extension!
BEOL memory process integration engineer
few open position in our beol memory integration team at imec. have a look at the link for more information, but in general you can expect to be responsible for bringing different emerging memories to the forefront!

i put the email of the integration group manager, but dont hesitate to reach out to me if you wqnt to discuss this here at the conference.

sebastien couet
Multiple Openings
Tokyo Electron Limited
Multiple openings in process, equipment, research scientists, modeling & simulation, mechanical, product engineers
Research staff member
IBM research
Advanced logic technology research (CMOS device, FEOL/MOL integration)
Design Technology Co-Optimization Researcher
As DTCO Researcher, you will work on the cutting edge of advanced CMOS technologies and you will contribute towards their evaluation and benchmarking, optimizing design and block level aspects to fully utilize future technologies.
Physical Design Researcher
As PD Researcher, you will work on the cutting edge of advanced CMOS technologies and you will contribute towards their evaluation and benchmarking, optimizing design and block level aspects to fully utilize future technologies.
Faculty positions in Electronic and Computer Engineering
The Hong Kong University of Science and Technology
Tenure-track faculty positions in the area of integrated circuits and systems
Multiple device/chip/system R&D positions available
AI Chip Center for Emerging Smart Systems (ACCESS)
ACCESS is looking for both local and overseas talents to work in our research center in Hong Kong. ACCESS, located at Hong Kong Science Park, provides not only a world-class working environment but also learning opportunities to research staff through a vast variety of activities, including workshops and training sessions; talks, seminars, and specific training courses delivered by international renowned experts, etc. Exchange programs will also be organized with our international and industrial partners to provide members of the project team with excellent opportunities to develop interdisciplinary skills, both within and outside the Center.

Currently, ACCESS is aggressively recruiting top research talents world-wide, who will work closely with international experts and industrial partners on the leading-edge AI chip technologies. We offer competitive salaries, fringe benefits and learning opportunities for professional development.
Research Scientist, cryogenic signal integrity
See details here:
Postdoc: Hardware spike detection and data compression for next generation CMOS neural probes
Integrate massive multi-channel feature extraction algorithms on chip that enable clinical translation of next-generation neural probes
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