Compiler Engineer
Facebook
Facebook is seeking software engineers to join our team building compilers for on-device ML accelerators. Still a small team, a lot of work to be done and a lot of room for contribution. If you're excited about HW/SW co-design and looking for an opportunity to work across the stack from ML applications to the accelerator architecture, please let us know!
Link:
https://www.facebook.com/careers/jobs/684211715808268/
Research Intern - Machine Learning Compilers
Microsoft
See job description on Microsoft careers site.
Full time positions also available.
Link:
https://careers.microsoft.com/us/en/job/948052/Research-Intern-Machine-Learning-Compilers
Senior/Staff Deep Learning Compiler Engineer
Cruise LLC
Architect DL compiler using industry standard open source compiler frameworks, customized for autonomous vehicle (AV) hardware compute platforms. Solving challenging AI model translation and optimization problems that push the SOTA in this field. Work on entire stack - defining/extending DSL, IR dialect customizations/optimization, auto-parallelizaton, codegen optimizations for heterogenous compute platforms. Work on integrating new technologies from deep learning network optimizations into compiler stack.
Link:
https://www.linkedin.com/jobs/view/1983800373/?recommendedFlavor=IN_NETWORK&lipi=urn%3Ali%3Apage%3Ad_flagship3_profile_open_to_hiring_seeker_detail%3BO99DsGfmTYmZST0fijI4%2BA%3D%3D
Graduate Student Summer Internship in VM Engineering
Twitter
The VM Engineering Team at Twitter has an open position for a graduate summer summer intern for Summer 2020. If you are pursuing a Ph.D. in the areas of JIT compilers, dynamic memory management, language runtimes, and performance engineering/tools, please contact us.
For any questions during the conference, several of our engineers are at the CGO conference and in the Graal Workshop on February 27.
Link:
http://jobs.twitter.com
Senior/Staff Deep Learning Inference Engineer
Cruise LLC
Working on challenging problems in translating and optimizing deep learning AI model prototypes defined in high level flexible frameworks into implementation optimized for efficient, safe and reliable deployment on autonomous vehicles (AV). Be part of a cross-functional collaborative team, working with ML developers, ML accelerators, Compilers & Toolchain, System Performance experts, and future compute (hardware architecture) experts. Bring your expertise in designing production quality code under performance and quality constraints necessary for deployment to AV.
Link:
https://www.linkedin.com/jobs/view/2248134901/?recommendedFlavor=IN_NETWORK&lipi=urn%3Ali%3Apage%3Ad_flagship3_profile_open_to_hiring_seeker_detail%3Bu42fT9hpSQyYU%2FT54lwdYQ%3D%3D
VM Engineer (Compilers & Performance)
Twitter
The VM Engineering Team at Twitter is looking for an engineer with a background in JIT compilation, a broad interest in program optimization at all levels, and performance engineering experience pertaining to cloud-scale industrial-strength distributed systems. A strong software engineering background in a fast-paced collaborative environment, and experience working with C2, Graal, or other JVM JIT compiler would be an added bonus.
For any questions during the conference, several of our engineers are at the CGO conference and in the Graal Workshop on February 27.
Link:
http://jobs.twitter.com
Machine Learning Compiler Engineer
Google
The Machine Learning Compilation team at Google is looking for compiler engineers to help us build the next generation CPU compiler for TensorFlow and JAX. This is a unique opportunity to join a growing team that works on cutting edge compilation technologies in the exciting field of systems for machine learning. The project is based on MLIR and is open sourced.
We are looking for creative thinkers with a strong background in compilers, code generation and optimizations, polyhedral compilation and/or domain-specific computing interested in applying research technology in practice. Fluency in C++ is a must. Experience with machine learning or machine learning systems is a plus but not required.
If you are interested in this role please reach out to learn more or email to mlir-hiring@google.com.
Post-Doctoral Researcher
The Ohio State University
Design high-performance and scalable middleware for Scientific Computing, Machine Learning, Deep Learning. Exploits the architectural features of the latest computing, networking, and accelerator technologies. Work in a team environment and contribute to the three internationally-recognized projects in the group: http://mvapich.cse.ohio-state.edu, http://hidl.cse.ohio-state.edu, and http://hibd.cse.ohio-state.edu.
Link:
http://nowlab.cse.ohio-state.edu/jobs/
Machine Learning Compiler Engineer
AMD
Software development to improve execution of Machine Learning system software for AMD GPU compute platforms. Work as part of a team creating optimized compiler transformations and tuned libraries that take advantage of the latest LLVM and MLIR compiler infrastructure. Become part of the AMD development team and broader open-source community to analyze, develop, test and upstream improvements that make AMD the best platform for machine learning applications.
Link:
https://jobs.amd.com/job/Austin-Machine-Learning-Compiler-Optimization-Engineer-82676-Texa/710044100/
Silicon Architect, Machine Learning Architecture
Google
Edge TPU architecture team is hiring silicon architects. Please contact me if you are interested in HW/SW co-design and building ML hardware accelerators.
Responsibilities
* Drive architectural definition as part of a larger team of domain experts.
* Work with leaders, product managers, and customers to define and execute projects.
* Own definition and delivery of design from conception to product delivery.
Here is a direct link to the Google careers page for this role: https://careers.google.com/jobs/results/91895175422321350/
Link:
https://careers.google.com/jobs/results/91895175422321350/
MPI Software Engineer
The Ohio State University
The Network-Based Computing Laboratory (NBCL) at the Ohio State University is looking for an enthusiastic MPI Software Engineer with strong expertise in MPI, high-performance computing, network programming with modern interconnects (InfiniBand, Ethernet/iWARP, and RoCE), GPGPUs (NVIDIA and AMD), and accelerators to join the MVAPICH MPI libarary project (http://mvapich.cse.ohio-state.edu). The libraries designed under this project are being used by more than 3,000 organizations in 89 countries for HPC, ML, and DL. These libraries are also empowering many TOP500 clusters worldwide during the last 15 years. More than 1.25M downloads of these libraries have taken place from the project's site. These libraries are also available with software stacks of many vendors and distros (RedHat, SuSE, Spack, and OpenHPC).
Link:
http://nowlab.cse.ohio-state.edu/jobs/#mpi
Software Engineer
Twitter
You will diagnose, and tackle complex distributed systems problems and provide solutions that have fundamental impact at our massive scale. You will define and deliver libraries which enable engineers to build reliable and efficient Twitter-scale services
Link:
https://careers.twitter.com/en/work-for-twitter/202101/2baed628-bae4-4ed3-9de3-8a1492b9517c/e972575c-62fd-4519-8793-765bb89ffa78.html/senior-software-engineer-core-system-libraries.html
Postdoctoral Researcher
Argonne National Laboratory
Postdoctoral Appointee-AI Architectures for Science
The ALCF has an opening for a postdoctoral position on evaluating the efficacy of AI architectures for scientific machine learning and on the design of next generation AI architectures for science. In particular, the ALCF is exploring using novel AI hardware working in collaboration with vendors, including Cerebras, Sambanova, Groq, Nvidia, Intel, among others, for scientific machine learning. We are work with a diverse set of science applications, including but not limited to: Computational Chemistry, Plasma Physics, High Energy Physics, analysis of Light Source data such as that from the Advanced Photon Source, Biology, Astronomy, and other science disciplines.
The successful candidate will be expected to implement, optimize and scale machine learning models on cutting edge AI hardware and systems to fully exploit the architectural and software features these systems. The candidate will also work on research and development on how to integrate and scale AI architectures with existing and upcoming supercomputers at the facility to accelerate science insights.
Link:
http://bit.ly/3kr81Ni
A.I Compiler Engineer
nod.ai
Nod's A.I Compiler Engineers deliver the best compiler frontend for various Machine Learning frameworks like Tensorflow, PyTorch etc and very efficiently parallelize and distribute the workloads onto the Nod Runtime for code-generated, auto-tuned high performance execution on large clusters or hyper parallel SoCs. You will be working with an all engineer team balancing research and productization. We have successfully deployed our stack on edge devices, highly parallel A.I inference chips distributed clusters and are looking for people with expert level C++ skills. ML framework or Compiler experience would be a bonus but is not necessary.
More details here: https://www.linkedin.com/jobs/view/2332226308/
Link:
https://nod.ai
Compiler Engineer
Cerebras Systems
https://cerebras.net/career/4116771003/
Link:
https://cerebras.net/career/4116771003/
LLVM Backend Engineer
Cerebras Systems
https://cerebras.net/career/4118967003/
Link:
https://cerebras.net/career/4118967003/
Compiler Engineer
AMD
The Role:
If you are a Compiler Engineer with passion to work on leading edge Languages implementation and compilation for AMD GPU, we would love to talk to you and share with you the many exciting projects we are working on.
The Person:
We are building first class compilation technology for C++, HIP, OpenCL, OpenMP and Python. The successful candidate will work on language implementation and optimization in the open source LLVM compiler framework. In addition to HPC apps, our compilers are used in the development of AMD Machine Learning frameworks and Libraries. The successful candidate will have a phenomenal opportunity to work closely with AMD first class Machine Learning, HPC and Libraries developers to get the best performance from the compiler.
Link:
https://jobs.amd.com/job/Santa-Clara-Compiler-Engineer-83987-Cali/716009400/?locale=en_US
Systems Engineer
Katana Graph
The race to exploit new computing and storage technologies is on.
Recent advances in hardware acceleration and persistent memory have unlocked new opportunities in areas like machine learning and neural networks, but we believe the impact of these disruptive technologies can and will be much broader and deeper, especially when combined with recent fundamental advances in algorithms.
Building on decades of experience in developing state-of-the-art distributed systems, Katana Graph is bringing together experts in hardware acceleration, cloud computing, storage systems, and high-performance computing to help create the platform of the future for data processing and analysis in this new world of specialized hardware and revitalized algorithms.
Katana Graph recently completed a $28.5 million Series A financing round led by Intel Capital with participation from existing and new investors including WRVI Capital, Nepenthe Capital, Dell Technologies Capital, and Redline Capital.
As a Senior Systems Engineer, you will play a central role designing and implementing our core platform. You will be responsible for developing the compute and storage engine and optimizing its performance over a variety of use-cases while also ensuring high-availability and reliancy.
Responsibilities
Develop core compute and storage platform
Maintain and develop state-of-the-art performance for multi-threaded, multi-GPU and multi-machine analytics kernels
Ensure consistency and high-availability of the core platform
Requirements
Ph.D. in computer science and 2+ years of professional experience or 5+ years of professional experience
5+ years of experience in C++
Experience developing and deploying high-performance and scalable systems
Locations: Austin, TX; Santa Clara, CA; Remote, USA
Link:
https://boards.greenhouse.io/katanagraph/jobs/4001202004?gh_src=0e7e81f84us
Complier Developer
Reservoir Labs
Job Description
If you're interested in really neat computer architectures and the compiler challenges associated with them, then you really want to be talking to us! We work at the cutting edge of compilers and computer architecture. These are real machines and they are doing important work.
Reservoir Labs is looking for a Compiler Developer to join our growing business. We are tackling some of the most interesting and challenging problems in high performance computing, including designing compilers for high performance embedded computing systems, compiler algorithms for machine learning, and simulators and software for advanced supercomputers. This is a great opportunity for a rewarding career in applied computer science research.
Job Responsibilities
- Work on a wide range of projects within small teams of engineers
- Frequently interact with clients and effectively identify and meet client needs
- Represent the company in conferences and industry forums
- Opportunity to lead and manage projects
- LLVM is a plus
Link:
https://grnh.se/018a404c2us
Postdoctoral Associate / Parallel Computing and Compilers
MIT
The Supertech research group in the MIT Computer Science and Artificial Intelligence Laboratory seeks multiyear Postdoctoral Associates to join the OpenCilk development team led by Professor Charles E. Leiserson, Dr. Tao B. Schardl, and Research Scientist Dorothy Curtis. The open-source OpenCilk software platform, a new implementation of the Cilk parallel programming platform, will feature a superior compiler based on the Tapir/LLVM compiler (Best Paper, PPoPP 2017), a new work-stealing runtime system, and a suite of parallelprogramming productivity tools. Candidates should be recent Ph.D. graduates in computer science and engineering with excellent C/C++ programming skills and publications in one or more of the following areas:
parallel computing (particularly multicore);
language runtime systems and compilers (especially LLVM);
software productivity tools;
user interface design and implementation;
software performance engineering (writing fast code);
algorithms and data structures;
software engineering, testing, benchmarking, and/or release management;
cloud environments and operating systems.
Link:
http://www.opencilk.org
Compiler and Runtime Engineer
Facebook
The Programming Languages and Runtimes team at Facebook is seeking an experienced Software Engineer with a strong expertise in compiler technology. Our team builds optimizing compilers and virtual machines for our massive codebase of backend services, web infrastructure and mobile applications. The solutions and tooling we develop target languages such as C/C++, Android/Java, Hack or JavaScript. A significant fraction of our work is based on the Clang/LLVM framework and familiarity with that compiler infrastructure would be a plus.
Link:
https://www.facebook.com/careers/jobs/655154675134980/
Automatic Parallelization & Compiler Research Engineer
Reservoir Labs
We have a great platform, R-Stream, for applying and advancing the polyhedral model of optimization for these challenges. This is an opportunity for a rewarding career in applied computer science research.
Job Responsibilities
- Develop and apply polyhedral optimization for new architecture and applications
- Work on a wide range of projects within small teams of engineers
- Frequently interact with clients and effectively identify and meet client needs
- Represent the company in conferences and industry forums
- Opportunity to lead and manage projects
Desired Skills
- An advanced degree in the field of computer science or applied mathematics
- Experience with compiler development, the polyhedral model, and computer architecture
- Experience with software engineering
- Solid intellectual ability, motivation, and a strong history of achievement
- Excellent oral and written communication skills
We are particularly interested in candidates with knowledge of the polyhedral model. Genuine interest in the spectrum of Reservoir’s projects is key, and the flexibility to move among them is essential.
Link:
https://grnh.se/48b0f64d2us
Post-doctoral researcher and Ph.D. positions in architecture and hardware security
Yale University, Electrical Engineering
Please see our page: https://caslab.csl.yale.edu/jobs/
Link:
https://caslab.csl.yale.edu/jobs/
Research Associate (PostDoc) / Assistant in Programmable Hardware Security
University of Cambridge
I'm looking for a researcher to work on novel programmable hardware for application security to provide resilience to current and future attack techniques.
Please see full information through the link and feel free to contact me with any questions.
Link:
https://www.jobs.cam.ac.uk/job/28721/
Compiler Engineer
Intel
Compilers Engineering (CE) team is in Intel Architecture, Graphics and Software(IAGS) Group Developer Software Engineering(DSE) Division. CE's mission is to create, sell, and support compiler products with significant market impact that give advantages to our customers and Intel Silicon. CE is looking for talented and passionate software engineers to join us. In CE you will collaborate with multinational engineering teams and we offer you great growth space and global vision.
Developing compiler technology as the primary job function; Designs, develops, debugs & tests compiler software and programming languages e.g. advanced compiler optimizations and features specific for Intel Architectures, parallelization and vectorization through compilers, new programming languages support. May work directly with hardware design team, companies and communities developing compilers, participate in language and standard groups. Usually holds an academic degree in Computer Science, Computer Engineering or Computational Science.
Qualifications
Minimum Qualifications:
Candidate must have a Master Degree in Computer Science, Computer Engineering or a related field, plus 5+ related working experience, or a PhD Degree plus 2+ working experience.
Solid knowledge base and experience in the following areas: C/C++programming, algorithm & data structures, and computer architecture.
Fluent written and verbal communication skills and be able to clearly communicate technical details and concept.
Preferred Qualifications (At least have one or more experience below):
Good experience in compiler infrastructure (GCC/LLVM/JIT etc.), development, debugging and optimization.
Good experience in workload performance tuning in system level.
Knowledge of Intel x86 instruction set architecture and Advanced Vector Extensions AVX.
Strong capability of analyzing and solving complex technical problems.
Deep Learning Performance Engineer
Intel
https://intel.wd1.myworkdayjobs.com/External/job/PRC-Shanghai/Deep-Learning-Performance-Engineer_JR0151714-1
Link:
https://intel.wd1.myworkdayjobs.com/External/job/PRC-Shanghai/Deep-Learning-Performance-Engineer_JR0151714-1
Compiler and Runtime Engineer
FuriosaAI
FuriosaAI’s engineers develop the most powerful next-generation AI chip in the world. Our products need to handle various kinds of DNN models - from vision and NLP to GNN models - and various patterns of workloads. To achieve the challenging goals, we run vertically integrated engineering teams for researching DNN models, building software stacks, and designing hardware architectures. The co-designing efforts and the vertically integrated engineering efforts are the driving force of FuriosaAI.
FuriosaAI is looking for highly motivated and talented software engineers to bring fresh ideas and robust foundations from all areas including DNN model compilation, hardware virtualization, highly efficient runtime over multiple machines; the list is expanding in every area of software engineering every day. We need our engineers to be versatile, have an aspiration for perfection, and be enthusiastic to explore new problems and ideas beyond the given tasks to push the boundaries.
As a software engineer, you will have opportunities to work with people with diverse backgrounds. To roll out the most powerful next-generation AI chip to the world and to compete with tech giants, we don’t set any limitations on who you work with, where you work, or when you work. You will tackle the most challenging problems in the world with us.
Link:
https://furiosa.ai
Hardware Engineer
FuriosaAI
FuriosaAI’s engineers develop the most powerful next-generation AI chip in the world. Our products need to handle various kinds of DNN models - from vision and NLP to GNN models - and various patterns of workloads. To achieve the challenging goals, we run vertically integrated engineering teams for researching DNN models, building software stacks, and designing hardware architectures. The co-designing efforts and the vertically integrated engineering efforts are the driving force of FuriosaAI.
We need our engineers to be versatile, have an aspiration for perfection, and be enthusiastic to explore new problems and ideas beyond the given tasks to push the boundaries.
As a hardware engineer, you will have opportunities to work with people with diverse backgrounds. To roll out the most powerful next-generation AI chip to the world and to compete with tech giants, we don’t set any limitations on who you work with, where you work, or when you work. You will tackle the most challenging problems in the world with us.
Link:
https://www.furiosa.ai/jd/hardware-engineer.pdf
PhD Scholarship in Compiler Autogeneration to Support Novel Microarchitectures and ISA Extensions
Imperial College London
Applications are invited for a PhD student to simplify and automate the generation of compiler optimisations for new processor designs. The core idea is to combine machine learning techniques (including, but not restricted to deep learning) with formal processor description, under the joint supervision of Prof Paul H J Kelly (https://www.imperial.ac.uk/people/p.kelly) at Imperial, and Dr Martin Berger at Huawei Research UK, based in London.
Link:
https://www.hipeac.net/jobs/12079/phd-scholarship-in-compiler-autogeneration-to-support-novel-microarchitectures-and-isa-extensions/
PhD student position in pattern-based DSL compilation
Linköping University
This PhD student position is part of a new externally funded research project together with research groups from two other universities in Sweden. The tasks for our work package include research and development of a pattern-based programming model, compiler technology and automated design-space exploration for the efficient execution of multi-domain programs on AI accelerator hardware, such as tensor cores in recent GPUs, systolic arrays as in TPUs, and reconfigurable architectures. In particular, the project involves the adaptation of a modern DSL compiler framework as well as development of specific techniques for program analysis, parallelization, optimization, adaptivity support, and code generation. The working language in the project is English.
Link:
https://liu.se/en/work-at-liu/vacancies?rmpage=job&rmjob=15821&rmlang=UK
AMD Research Summer Interns
AMD Research
We have a couple of AMD Research summer internship opportunities available related to cache/memory systems. Looking for strong simulator hacking and software engineering skills, workload and performance analysis, and a can-do attitude! Due to a variety of constraints, applicants must be US based (i.e., currently physically located in the US) and export-control restrictions also apply.
Email your resume/CV directly to me at gabriel.loh@amd.com. Also feel free to DM me on Whova, LinkedIn, Twitter, etc.
GPU Compiler Intern
Intel
We have a summer internship opportunity in the GPU compiler area. Graduate students in the compiler and programming systems area with GPU background are encouraged to apply. Please email your resume/CV directly to me at youfeng.wu@intel.com.
Research Internship & PostDoc Opportunities (LLVM/OpenMP/GPU/Polyhedral/ML/...)
Argonne National Laboratory (ANL)
Argonne National Laboratory is actively working on LLVM advancements, OpenMP standardization, parallel program optimization, and novel solutions using compiler technology for (HPC) software development.
We have opportunities for research internships year-round and regularly open post doc positions. Please reach out to learn more.
~ Johannes Doerfert
Researcher at Microsoft Research
Microsoft
The Research in Software Engineering Group in Microsoft Research seeks candidates in the areas of programming languages, compilers/runtime, automated reasoning, high-performance computing, verification, and software engineering.
Link:
https://careers.microsoft.com/us/en/job/926265/Researcher-Research-in-Software-Engineering-RiSE-Microsoft-Research
CPU Architecture/Micro-Architecture - Multiple positions available
Futurewei Technologies
The candidates will take part in the definition and implementation of
Futurewei’s next generation RISC-V based microprocessor. The individual shall
be responsible for the various phases of the development work.
Qualifications:
• Hands-on experience in CPU architecture/micro-architecture/design
• Must be a highly organized, detail-oriented self-starter, who can deliver
independently as well as in a team environment
• Master’s degree or higher preferred
• Good verbal and written communication skills
Responsibilities:
• Define the next generation micro-architecture, participate in Timing
Feasibility studies, Cost and power estimation, Performance projection,
Competitive analysis
• Micro-architecture Definition and specification
• Participate in RTL Design
• Experience in Instruction fetch, rename/decode, out of order design,
execution.
• Experience in Cache, Memory subsystem design
• Write optimized RTL for high-speed timing, area and power
• Lead the development effort and Carry out design work of critical
function units
• Be able to conduct microprocessor research, publish papers.
CPU Architecture/Micro-Architecture Summer Interns
Futurewei Technologies
The candidates will take part in the RISC-V based research on pipeline optimization and design methodology.
Qualifications:
Deep knowledge in Computer Architecture/Microarchitecture demonstrated by relevant coursework or projects.
Proven research track record is highly preferred
Strong programming skills.
Knowledge or hands on experience in RISC-V based technology development is a plus
Ph.D or M.S. (student) in Electrical Engineering and/or Computer Science/Engineering
Good verbal and written communication skills
Job description:
The intern student researcher will have the opportunities to work with senior researchers in the lab to conduct research projects related to RISC-V based technology development. The study may involve some or all stages of project design from conception to tape-out. Successful research work will have the possibility to be published in reputed conferences/journals and/or patented.
Senior Compiler Engineer - Deep Learning
NVIDIA
In this role, you will be responsible for analyzing deep learning networks and developing compiler optimization algorithms. You’ll collaborate with members of the deep learning software framework teams and the hardware architecture teams to accelerate the next generation of deep learning software. The scope of these efforts includes defining public APIs, performance tuning and analysis, crafting and implementing compiler and optimization techniques for neural networks, and other general software engineering work.
Link:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Compiler-Engineer---Deep-Learning_JR1937840-1
Senior Compiler Engineer - Deep Learning
NVIDIA
In this role, you will be responsible for analyzing deep learning networks and developing compiler optimization algorithms. You’ll collaborate with members of the deep learning software framework teams and the hardware architecture teams to accelerate the next generation of deep learning software. The scope of these efforts includes defining public APIs, performance tuning and analysis, crafting and implementing compiler and optimization techniques for neural networks, and other general software engineering work.
Link:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/China-Shanghai/Senior-Compiler-Engineer---Deep-Learning_JR1935323
Compiler Engineering Manager - Deep Learning
NVIDIA
In this role, you will be managing a team of experienced compiler engineers to analyze deep learning networks and develop compiler optimization algorithms. You will establish team objectives to meet schedules and goals, establish and evolve policies and procedures that affect the immediate organization, communicate with senior management for team vision and development. You’ll collaborate with members of the deep learning software framework teams and the hardware architecture teams to accelerate the next generation of deep learning software. The scope of your team's efforts includes defining public APIs, performance tuning and analysis, crafting and implementing compiler and optimization techniques for neural networks, and other general software engineering work.
Link:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Compiler-Engineering-Manager---Deep-Learning_JR1937828
Compiler Engineering Manager - Deep Learning
NVIDIA
In this role, you will be managing a team of experienced compiler engineers to analyze deep learning networks and develop compiler optimization algorithms. You will establish team objectives to meet schedules and goals, establish and evolve policies and procedures that affect the immediate organization, communicate with senior management for team vision and development. You’ll collaborate with members of the deep learning software framework teams and the hardware architecture teams to accelerate the next generation of deep learning software. The scope of your team's efforts includes defining public APIs, performance tuning and analysis, crafting and implementing compiler and optimization techniques for neural networks, and other general software engineering work.
Link:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/China-Shanghai/Compiler-Engineering-Manager---Deep-Learning_JR1935326
Virtual recruiting room - Wednesday March 3, 7am ~ 10:30am PST
Futurewei Technologies
Date: Wednesday, March 3, 2021
Time: 7am PST ~ 10:30am PST (10am EST ~ 1:30 pm EST)
Zoom bridge:
Join Zoom Meeting: https://futurewei.zoom.us/j/95727676882
Meeting ID: 957 2767 6882
Agenda:
• Meet and greet: 7am PST ~ 9:30am PST
• Intro and info session: 9:30am PST ~ 10:30am PST
o Futurewei & IC Lab Overview
o IC Lab Full-Time, Internship & Contract Position Opportunities
o Hiring Process Overview
o Q & A
CPU Micro architect/ Design Engineer
Futurewei Technologies Inc
We are looking for Senior Staff Engineer - CPU Micro architect/ Design. The candidate will take part in definition and implementation of FutureWei’s next generation high-end microprocessor. The individual shall be responsible for the various phases of the development work.
Depending on the actual assignment and skill set, the candidate will focus on all or part of the following technical areas:
1) Define the next generation micro-architecture, participate in Timing Feasibility studies, Cost and power estimation, Performance projection, Competitive analysis
2) Micro-architecture Definition and specification
Participate in RTL Design
3) Experience in Instruction fetch, rename/decode, out of order design, execution.
4) Experience in Cache, Memory subsystem design
Write optimized RTL for high-speed timing, area and power
5) Lead the development effort and Carry out design work of critical function units
6) Be able to conduct microprocessor research, publish papers.
Link:
https://www.linkedin.com/jobs/view/senior-staff-engineer-cpu-micro-architect-design-at-futurewei-technologies-inc-2415411775/
CPU Architecture/Micro Architecture, Intern
Futurewei Technologies Inc
The intern student researcher will have the opportunities to work with senior researchers in the lab to conduct research projects related to RISC V based technology development . The study may involve some or all stages of project design from conception to tape out. Successful research work will have the possibility to be published in reputed conferences/journals and/or patented.
